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<a href="#nested-classes">Data Structures</a> &#124;
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  <div class="headertitle"><div class="title">dma.h File Reference</div></div>
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<div class="textblock"><code>#include &quot;<a class="el" href="pico_8h_source.html">pico.h</a>&quot;</code><br />
<code>#include &quot;hardware/structs/dma.h&quot;</code><br />
<code>#include &quot;hardware/regs/dreq.h&quot;</code><br />
<code>#include &quot;pico/assert.h&quot;</code><br />
<code>#include &quot;hardware/regs/intctrl.h&quot;</code><br />
</div><div class="textblock"><div class="dynheader">
Include dependency graph for dma.h:</div>
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<p><a href="rp2__common_2hardware__dma_2include_2hardware_2dma_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structdma__channel__config.html">dma_channel_config</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:a84ce358a69e81abaf4a137ad160ca737"><td class="memItemLeft" align="right" valign="top"><a id="a84ce358a69e81abaf4a137ad160ca737" name="a84ce358a69e81abaf4a137ad160ca737"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PARAM_ASSERTIONS_ENABLED_HARDWARE_DMA</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:a84ce358a69e81abaf4a137ad160ca737"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6c72cc3aafb409371f60fefd0463e289"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga6c72cc3aafb409371f60fefd0463e289">DMA_IRQ_NUM</a>(irq_index)</td></tr>
<tr class="memdesc:ga6c72cc3aafb409371f60fefd0463e289"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the <a class="el" href="group__hardware__irq.html#gaf30862f51b5994ffd5863176a185d137">irq_num_t</a> for the nth DMA interrupt.  <a href="group__hardware__dma.html#ga6c72cc3aafb409371f60fefd0463e289">More...</a><br /></td></tr>
<tr class="separator:ga6c72cc3aafb409371f60fefd0463e289"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="enum-members" name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:gaccecdff367b06a019373e9a55d4f3e01"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaccecdff367b06a019373e9a55d4f3e01">dma_channel_transfer_size</a> { <a class="el" href="group__hardware__dma.html#ggaccecdff367b06a019373e9a55d4f3e01abd7d246406a2ebe4dd49780db176dc3c">DMA_SIZE_8</a> = 0
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 }</td></tr>
<tr class="memdesc:gaccecdff367b06a019373e9a55d4f3e01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enumeration of available DMA channel transfer sizes.  <a href="group__hardware__dma.html#gaccecdff367b06a019373e9a55d4f3e01">More...</a><br /></td></tr>
<tr class="separator:gaccecdff367b06a019373e9a55d4f3e01"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:a40e48161fe94b0ae92882993ac757803"><td class="memItemLeft" align="right" valign="top"><a id="a40e48161fe94b0ae92882993ac757803" name="a40e48161fe94b0ae92882993ac757803"></a>
static void&#160;</td><td class="memItemRight" valign="bottom"><b>check_dma_channel_param</b> (__unused uint channel)</td></tr>
<tr class="separator:a40e48161fe94b0ae92882993ac757803"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0294545e4864f32e2ec58904e83c201a"><td class="memItemLeft" align="right" valign="top"><a id="a0294545e4864f32e2ec58904e83c201a" name="a0294545e4864f32e2ec58904e83c201a"></a>
static void&#160;</td><td class="memItemRight" valign="bottom"><b>check_dma_timer_param</b> (__unused uint timer_num)</td></tr>
<tr class="separator:a0294545e4864f32e2ec58904e83c201a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6dbf83981aae0eb0adc74453123affd3"><td class="memItemLeft" align="right" valign="top"><a id="a6dbf83981aae0eb0adc74453123affd3" name="a6dbf83981aae0eb0adc74453123affd3"></a>
static <a class="el" href="structdma__channel__hw__t.html">dma_channel_hw_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><b>dma_channel_hw_addr</b> (uint channel)</td></tr>
<tr class="separator:a6dbf83981aae0eb0adc74453123affd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae1b3c916746b3d2052f21b7dda34aab9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gae1b3c916746b3d2052f21b7dda34aab9">dma_channel_claim</a> (uint channel)</td></tr>
<tr class="memdesc:gae1b3c916746b3d2052f21b7dda34aab9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark a dma channel as used.  <a href="group__hardware__dma.html#gae1b3c916746b3d2052f21b7dda34aab9">More...</a><br /></td></tr>
<tr class="separator:gae1b3c916746b3d2052f21b7dda34aab9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa430bc53dc2b36d727ad976f6348c8b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaa430bc53dc2b36d727ad976f6348c8b3">dma_claim_mask</a> (uint32_t channel_mask)</td></tr>
<tr class="memdesc:gaa430bc53dc2b36d727ad976f6348c8b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark multiple dma channels as used.  <a href="group__hardware__dma.html#gaa430bc53dc2b36d727ad976f6348c8b3">More...</a><br /></td></tr>
<tr class="separator:gaa430bc53dc2b36d727ad976f6348c8b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac50200739b88a2fd52316f4150533035"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gac50200739b88a2fd52316f4150533035">dma_channel_unclaim</a> (uint channel)</td></tr>
<tr class="memdesc:gac50200739b88a2fd52316f4150533035"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark a dma channel as no longer used.  <a href="group__hardware__dma.html#gac50200739b88a2fd52316f4150533035">More...</a><br /></td></tr>
<tr class="separator:gac50200739b88a2fd52316f4150533035"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0211681c906ebe4971d0cded8e98f8b5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga0211681c906ebe4971d0cded8e98f8b5">dma_unclaim_mask</a> (uint32_t channel_mask)</td></tr>
<tr class="memdesc:ga0211681c906ebe4971d0cded8e98f8b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark multiple dma channels as no longer used.  <a href="group__hardware__dma.html#ga0211681c906ebe4971d0cded8e98f8b5">More...</a><br /></td></tr>
<tr class="separator:ga0211681c906ebe4971d0cded8e98f8b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b0a6680795b9c9ed787362a8a057206"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga4b0a6680795b9c9ed787362a8a057206">dma_claim_unused_channel</a> (bool required)</td></tr>
<tr class="memdesc:ga4b0a6680795b9c9ed787362a8a057206"><td class="mdescLeft">&#160;</td><td class="mdescRight">Claim a free dma channel.  <a href="group__hardware__dma.html#ga4b0a6680795b9c9ed787362a8a057206">More...</a><br /></td></tr>
<tr class="separator:ga4b0a6680795b9c9ed787362a8a057206"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9aadb81f53b979bde1c1a81164d1eff2"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga9aadb81f53b979bde1c1a81164d1eff2">dma_channel_is_claimed</a> (uint channel)</td></tr>
<tr class="memdesc:ga9aadb81f53b979bde1c1a81164d1eff2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a dma channel is claimed.  <a href="group__hardware__dma.html#ga9aadb81f53b979bde1c1a81164d1eff2">More...</a><br /></td></tr>
<tr class="separator:ga9aadb81f53b979bde1c1a81164d1eff2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga28d1103cea7f7d73406a2aee44bfebd9"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga28d1103cea7f7d73406a2aee44bfebd9">channel_config_set_read_increment</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool incr)</td></tr>
<tr class="memdesc:ga28d1103cea7f7d73406a2aee44bfebd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DMA channel read increment in a channel configuration object.  <a href="group__channel__config.html#ga28d1103cea7f7d73406a2aee44bfebd9">More...</a><br /></td></tr>
<tr class="separator:ga28d1103cea7f7d73406a2aee44bfebd9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga864c9d35a39c315f2972b7272f860e9e"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga864c9d35a39c315f2972b7272f860e9e">channel_config_set_write_increment</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool incr)</td></tr>
<tr class="memdesc:ga864c9d35a39c315f2972b7272f860e9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DMA channel write increment in a channel configuration object.  <a href="group__channel__config.html#ga864c9d35a39c315f2972b7272f860e9e">More...</a><br /></td></tr>
<tr class="separator:ga864c9d35a39c315f2972b7272f860e9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c5a515cf1cfc6a8889464250b1e375b"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga7c5a515cf1cfc6a8889464250b1e375b">channel_config_set_dreq</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, uint dreq)</td></tr>
<tr class="memdesc:ga7c5a515cf1cfc6a8889464250b1e375b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select a transfer request signal in a channel configuration object.  <a href="group__channel__config.html#ga7c5a515cf1cfc6a8889464250b1e375b">More...</a><br /></td></tr>
<tr class="separator:ga7c5a515cf1cfc6a8889464250b1e375b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7df3433a59311b83289490586f1242c8"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga7df3433a59311b83289490586f1242c8">channel_config_set_chain_to</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, uint chain_to)</td></tr>
<tr class="memdesc:ga7df3433a59311b83289490586f1242c8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DMA channel chain_to channel in a channel configuration object.  <a href="group__channel__config.html#ga7df3433a59311b83289490586f1242c8">More...</a><br /></td></tr>
<tr class="separator:ga7df3433a59311b83289490586f1242c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad1a02fcee90d21f133460006b025bac0"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#gad1a02fcee90d21f133460006b025bac0">channel_config_set_transfer_data_size</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, enum <a class="el" href="group__hardware__dma.html#gaccecdff367b06a019373e9a55d4f3e01">dma_channel_transfer_size</a> size)</td></tr>
<tr class="memdesc:gad1a02fcee90d21f133460006b025bac0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the size of each DMA bus transfer in a channel configuration object.  <a href="group__channel__config.html#gad1a02fcee90d21f133460006b025bac0">More...</a><br /></td></tr>
<tr class="separator:gad1a02fcee90d21f133460006b025bac0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd7ee73f3652261ae5e195b709cc6dc0"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#gadd7ee73f3652261ae5e195b709cc6dc0">channel_config_set_ring</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool write, uint size_bits)</td></tr>
<tr class="memdesc:gadd7ee73f3652261ae5e195b709cc6dc0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set address wrapping parameters in a channel configuration object.  <a href="group__channel__config.html#gadd7ee73f3652261ae5e195b709cc6dc0">More...</a><br /></td></tr>
<tr class="separator:gadd7ee73f3652261ae5e195b709cc6dc0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43c3a2dd43fe7e962b1de0e90a46bb9e"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga43c3a2dd43fe7e962b1de0e90a46bb9e">channel_config_set_bswap</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool bswap)</td></tr>
<tr class="memdesc:ga43c3a2dd43fe7e962b1de0e90a46bb9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DMA byte swapping config in a channel configuration object.  <a href="group__channel__config.html#ga43c3a2dd43fe7e962b1de0e90a46bb9e">More...</a><br /></td></tr>
<tr class="separator:ga43c3a2dd43fe7e962b1de0e90a46bb9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ccbf80d437f895f95ad0531197dcaab"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga8ccbf80d437f895f95ad0531197dcaab">channel_config_set_irq_quiet</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool irq_quiet)</td></tr>
<tr class="memdesc:ga8ccbf80d437f895f95ad0531197dcaab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set IRQ quiet mode in a channel configuration object.  <a href="group__channel__config.html#ga8ccbf80d437f895f95ad0531197dcaab">More...</a><br /></td></tr>
<tr class="separator:ga8ccbf80d437f895f95ad0531197dcaab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1acca0d1b5a1793c78dc0daec8a5fffc"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga1acca0d1b5a1793c78dc0daec8a5fffc">channel_config_set_high_priority</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool high_priority)</td></tr>
<tr class="memdesc:ga1acca0d1b5a1793c78dc0daec8a5fffc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the channel priority in a channel configuration object.  <a href="group__channel__config.html#ga1acca0d1b5a1793c78dc0daec8a5fffc">More...</a><br /></td></tr>
<tr class="separator:ga1acca0d1b5a1793c78dc0daec8a5fffc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8f61e99408c4440866af231f947a7b9"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#gab8f61e99408c4440866af231f947a7b9">channel_config_set_enable</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool enable)</td></tr>
<tr class="memdesc:gab8f61e99408c4440866af231f947a7b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable/Disable the DMA channel in a channel configuration object.  <a href="group__channel__config.html#gab8f61e99408c4440866af231f947a7b9">More...</a><br /></td></tr>
<tr class="separator:gab8f61e99408c4440866af231f947a7b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5eb02f42a33115052031d0b457fa2674"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga5eb02f42a33115052031d0b457fa2674">channel_config_set_sniff_enable</a> (<a class="el" href="structdma__channel__config.html">dma_channel_config</a> *c, bool sniff_enable)</td></tr>
<tr class="memdesc:ga5eb02f42a33115052031d0b457fa2674"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable access to channel by sniff hardware in a channel configuration object.  <a href="group__channel__config.html#ga5eb02f42a33115052031d0b457fa2674">More...</a><br /></td></tr>
<tr class="separator:ga5eb02f42a33115052031d0b457fa2674"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga432f0d010da5935d333c27fbce0135f8"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="structdma__channel__config.html">dma_channel_config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga432f0d010da5935d333c27fbce0135f8">dma_channel_get_default_config</a> (uint channel)</td></tr>
<tr class="memdesc:ga432f0d010da5935d333c27fbce0135f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the default channel configuration for a given channel.  <a href="group__channel__config.html#ga432f0d010da5935d333c27fbce0135f8">More...</a><br /></td></tr>
<tr class="separator:ga432f0d010da5935d333c27fbce0135f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga369ee3104c5a9b5a32673c163a499a1d"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="structdma__channel__config.html">dma_channel_config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga369ee3104c5a9b5a32673c163a499a1d">dma_get_channel_config</a> (uint channel)</td></tr>
<tr class="memdesc:ga369ee3104c5a9b5a32673c163a499a1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the current configuration for the specified channel.  <a href="group__channel__config.html#ga369ee3104c5a9b5a32673c163a499a1d">More...</a><br /></td></tr>
<tr class="separator:ga369ee3104c5a9b5a32673c163a499a1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7f379a63d28a2565ff9a433cb8d31c90"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html#ga7f379a63d28a2565ff9a433cb8d31c90">channel_config_get_ctrl_value</a> (const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *config)</td></tr>
<tr class="memdesc:ga7f379a63d28a2565ff9a433cb8d31c90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the raw configuration register from a channel configuration.  <a href="group__channel__config.html#ga7f379a63d28a2565ff9a433cb8d31c90">More...</a><br /></td></tr>
<tr class="separator:ga7f379a63d28a2565ff9a433cb8d31c90"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7449b659efb178a408f42f7f8f7b02f9"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga7449b659efb178a408f42f7f8f7b02f9">dma_channel_set_config</a> (uint channel, const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *config, bool trigger)</td></tr>
<tr class="memdesc:ga7449b659efb178a408f42f7f8f7b02f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set a channel configuration.  <a href="group__hardware__dma.html#ga7449b659efb178a408f42f7f8f7b02f9">More...</a><br /></td></tr>
<tr class="separator:ga7449b659efb178a408f42f7f8f7b02f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf6f6ffe56fa42dcb105032f110589ae"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gabf6f6ffe56fa42dcb105032f110589ae">dma_channel_set_read_addr</a> (uint channel, const volatile void *read_addr, bool trigger)</td></tr>
<tr class="memdesc:gabf6f6ffe56fa42dcb105032f110589ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the DMA initial read address.  <a href="group__hardware__dma.html#gabf6f6ffe56fa42dcb105032f110589ae">More...</a><br /></td></tr>
<tr class="separator:gabf6f6ffe56fa42dcb105032f110589ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf0156609fe51c07d07118b2aeb4e9ae6"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaf0156609fe51c07d07118b2aeb4e9ae6">dma_channel_set_write_addr</a> (uint channel, volatile void *write_addr, bool trigger)</td></tr>
<tr class="memdesc:gaf0156609fe51c07d07118b2aeb4e9ae6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the DMA initial write address.  <a href="group__hardware__dma.html#gaf0156609fe51c07d07118b2aeb4e9ae6">More...</a><br /></td></tr>
<tr class="separator:gaf0156609fe51c07d07118b2aeb4e9ae6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga16c0e08eda636f13053d8c8b0f81e821"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga16c0e08eda636f13053d8c8b0f81e821">dma_channel_set_trans_count</a> (uint channel, uint32_t trans_count, bool trigger)</td></tr>
<tr class="memdesc:ga16c0e08eda636f13053d8c8b0f81e821"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the number of bus transfers the channel will do.  <a href="group__hardware__dma.html#ga16c0e08eda636f13053d8c8b0f81e821">More...</a><br /></td></tr>
<tr class="separator:ga16c0e08eda636f13053d8c8b0f81e821"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga971d077ac39b2d7f7c6b45e2ddc5d190"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga971d077ac39b2d7f7c6b45e2ddc5d190">dma_channel_configure</a> (uint channel, const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *config, volatile void *write_addr, const volatile void *read_addr, uint transfer_count, bool trigger)</td></tr>
<tr class="memdesc:ga971d077ac39b2d7f7c6b45e2ddc5d190"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure all DMA parameters and optionally start transfer.  <a href="group__hardware__dma.html#ga971d077ac39b2d7f7c6b45e2ddc5d190">More...</a><br /></td></tr>
<tr class="separator:ga971d077ac39b2d7f7c6b45e2ddc5d190"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf64c461a405a8114591105d9dc53575"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gabf64c461a405a8114591105d9dc53575">dma_channel_transfer_from_buffer_now</a> (uint channel, const volatile void *read_addr, uint32_t transfer_count)</td></tr>
<tr class="memdesc:gabf64c461a405a8114591105d9dc53575"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a DMA transfer from a buffer immediately.  <a href="group__hardware__dma.html#gabf64c461a405a8114591105d9dc53575">More...</a><br /></td></tr>
<tr class="separator:gabf64c461a405a8114591105d9dc53575"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9110135d8161fc268d87dfb040d0f854"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga9110135d8161fc268d87dfb040d0f854">dma_channel_transfer_to_buffer_now</a> (uint channel, volatile void *write_addr, uint32_t transfer_count)</td></tr>
<tr class="memdesc:ga9110135d8161fc268d87dfb040d0f854"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a DMA transfer to a buffer immediately.  <a href="group__hardware__dma.html#ga9110135d8161fc268d87dfb040d0f854">More...</a><br /></td></tr>
<tr class="separator:ga9110135d8161fc268d87dfb040d0f854"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6407f7763b533c98e23f65e35c5e48ee"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga6407f7763b533c98e23f65e35c5e48ee">dma_start_channel_mask</a> (uint32_t chan_mask)</td></tr>
<tr class="memdesc:ga6407f7763b533c98e23f65e35c5e48ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start one or more channels simultaneously.  <a href="group__hardware__dma.html#ga6407f7763b533c98e23f65e35c5e48ee">More...</a><br /></td></tr>
<tr class="separator:ga6407f7763b533c98e23f65e35c5e48ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga355720e02713c7324b540efc6f632366"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga355720e02713c7324b540efc6f632366">dma_channel_start</a> (uint channel)</td></tr>
<tr class="memdesc:ga355720e02713c7324b540efc6f632366"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a single DMA channel.  <a href="group__hardware__dma.html#ga355720e02713c7324b540efc6f632366">More...</a><br /></td></tr>
<tr class="separator:ga355720e02713c7324b540efc6f632366"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga735e7c6c136c078689ead70790f4edb2"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga735e7c6c136c078689ead70790f4edb2">dma_channel_abort</a> (uint channel)</td></tr>
<tr class="memdesc:ga735e7c6c136c078689ead70790f4edb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop a DMA transfer.  <a href="group__hardware__dma.html#ga735e7c6c136c078689ead70790f4edb2">More...</a><br /></td></tr>
<tr class="separator:ga735e7c6c136c078689ead70790f4edb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf60011d46676c87b7139f37188eaa4b9"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaf60011d46676c87b7139f37188eaa4b9">dma_channel_set_irq0_enabled</a> (uint channel, bool enabled)</td></tr>
<tr class="memdesc:gaf60011d46676c87b7139f37188eaa4b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable single DMA channel's interrupt via DMA_IRQ_0.  <a href="group__hardware__dma.html#gaf60011d46676c87b7139f37188eaa4b9">More...</a><br /></td></tr>
<tr class="separator:gaf60011d46676c87b7139f37188eaa4b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad5c1ac22e0b4d9b831912fbb95460be4"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gad5c1ac22e0b4d9b831912fbb95460be4">dma_set_irq0_channel_mask_enabled</a> (uint32_t channel_mask, bool enabled)</td></tr>
<tr class="memdesc:gad5c1ac22e0b4d9b831912fbb95460be4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable multiple DMA channels' interrupts via DMA_IRQ_0.  <a href="group__hardware__dma.html#gad5c1ac22e0b4d9b831912fbb95460be4">More...</a><br /></td></tr>
<tr class="separator:gad5c1ac22e0b4d9b831912fbb95460be4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f9415c8f77ff0bacedf5a138a88d76f"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga4f9415c8f77ff0bacedf5a138a88d76f">dma_channel_set_irq1_enabled</a> (uint channel, bool enabled)</td></tr>
<tr class="memdesc:ga4f9415c8f77ff0bacedf5a138a88d76f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable single DMA channel's interrupt via DMA_IRQ_1.  <a href="group__hardware__dma.html#ga4f9415c8f77ff0bacedf5a138a88d76f">More...</a><br /></td></tr>
<tr class="separator:ga4f9415c8f77ff0bacedf5a138a88d76f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa20edc55a2cc4977d24bdb487a22aa5"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaaa20edc55a2cc4977d24bdb487a22aa5">dma_set_irq1_channel_mask_enabled</a> (uint32_t channel_mask, bool enabled)</td></tr>
<tr class="memdesc:gaaa20edc55a2cc4977d24bdb487a22aa5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable multiple DMA channels' interrupts via DMA_IRQ_1.  <a href="group__hardware__dma.html#gaaa20edc55a2cc4977d24bdb487a22aa5">More...</a><br /></td></tr>
<tr class="separator:gaaa20edc55a2cc4977d24bdb487a22aa5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6fefe19fa5539580315de923e42131d3"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga6fefe19fa5539580315de923e42131d3">dma_irqn_set_channel_enabled</a> (uint irq_index, uint channel, bool enabled)</td></tr>
<tr class="memdesc:ga6fefe19fa5539580315de923e42131d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable single DMA channel interrupt on either DMA_IRQ_0 or DMA_IRQ_1.  <a href="group__hardware__dma.html#ga6fefe19fa5539580315de923e42131d3">More...</a><br /></td></tr>
<tr class="separator:ga6fefe19fa5539580315de923e42131d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga720f2335e93b0e53e28959566ca18f3e"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga720f2335e93b0e53e28959566ca18f3e">dma_irqn_set_channel_mask_enabled</a> (uint irq_index, uint32_t channel_mask, bool enabled)</td></tr>
<tr class="memdesc:ga720f2335e93b0e53e28959566ca18f3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable multiple DMA channels' interrupt via either DMA_IRQ_0 or DMA_IRQ_1.  <a href="group__hardware__dma.html#ga720f2335e93b0e53e28959566ca18f3e">More...</a><br /></td></tr>
<tr class="separator:ga720f2335e93b0e53e28959566ca18f3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa86e892c47b054d3c22fa39c001c7c23"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaa86e892c47b054d3c22fa39c001c7c23">dma_channel_get_irq0_status</a> (uint channel)</td></tr>
<tr class="memdesc:gaa86e892c47b054d3c22fa39c001c7c23"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a particular channel is a cause of DMA_IRQ_0.  <a href="group__hardware__dma.html#gaa86e892c47b054d3c22fa39c001c7c23">More...</a><br /></td></tr>
<tr class="separator:gaa86e892c47b054d3c22fa39c001c7c23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf61d25264e49058d20fb607dc1c40981"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaf61d25264e49058d20fb607dc1c40981">dma_channel_get_irq1_status</a> (uint channel)</td></tr>
<tr class="memdesc:gaf61d25264e49058d20fb607dc1c40981"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a particular channel is a cause of DMA_IRQ_1.  <a href="group__hardware__dma.html#gaf61d25264e49058d20fb607dc1c40981">More...</a><br /></td></tr>
<tr class="separator:gaf61d25264e49058d20fb607dc1c40981"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43f1fe10d5eb241788f72ad11599fc11"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga43f1fe10d5eb241788f72ad11599fc11">dma_irqn_get_channel_status</a> (uint irq_index, uint channel)</td></tr>
<tr class="memdesc:ga43f1fe10d5eb241788f72ad11599fc11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a particular channel is a cause of DMA_IRQ_N.  <a href="group__hardware__dma.html#ga43f1fe10d5eb241788f72ad11599fc11">More...</a><br /></td></tr>
<tr class="separator:ga43f1fe10d5eb241788f72ad11599fc11"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafefe50f20c44bcfa7f729829a5d494f4"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gafefe50f20c44bcfa7f729829a5d494f4">dma_channel_acknowledge_irq0</a> (uint channel)</td></tr>
<tr class="memdesc:gafefe50f20c44bcfa7f729829a5d494f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_0.  <a href="group__hardware__dma.html#gafefe50f20c44bcfa7f729829a5d494f4">More...</a><br /></td></tr>
<tr class="separator:gafefe50f20c44bcfa7f729829a5d494f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d4b5d461ff09bb6e4e2a05df3b7c75c"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga4d4b5d461ff09bb6e4e2a05df3b7c75c">dma_channel_acknowledge_irq1</a> (uint channel)</td></tr>
<tr class="memdesc:ga4d4b5d461ff09bb6e4e2a05df3b7c75c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_1.  <a href="group__hardware__dma.html#ga4d4b5d461ff09bb6e4e2a05df3b7c75c">More...</a><br /></td></tr>
<tr class="separator:ga4d4b5d461ff09bb6e4e2a05df3b7c75c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0e8e022fbe67b80c16912254526fada"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gad0e8e022fbe67b80c16912254526fada">dma_irqn_acknowledge_channel</a> (uint irq_index, uint channel)</td></tr>
<tr class="memdesc:gad0e8e022fbe67b80c16912254526fada"><td class="mdescLeft">&#160;</td><td class="mdescRight">Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_N.  <a href="group__hardware__dma.html#gad0e8e022fbe67b80c16912254526fada">More...</a><br /></td></tr>
<tr class="separator:gad0e8e022fbe67b80c16912254526fada"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafbb5020a529ed6d39a11da88a6f313f2"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gafbb5020a529ed6d39a11da88a6f313f2">dma_channel_is_busy</a> (uint channel)</td></tr>
<tr class="memdesc:gafbb5020a529ed6d39a11da88a6f313f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check if DMA channel is busy.  <a href="group__hardware__dma.html#gafbb5020a529ed6d39a11da88a6f313f2">More...</a><br /></td></tr>
<tr class="separator:gafbb5020a529ed6d39a11da88a6f313f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab57c68850b8e6ed1623de75ad611db62"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gab57c68850b8e6ed1623de75ad611db62">dma_channel_wait_for_finish_blocking</a> (uint channel)</td></tr>
<tr class="memdesc:gab57c68850b8e6ed1623de75ad611db62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait for a DMA channel transfer to complete.  <a href="group__hardware__dma.html#gab57c68850b8e6ed1623de75ad611db62">More...</a><br /></td></tr>
<tr class="separator:gab57c68850b8e6ed1623de75ad611db62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga078c3c80d5637850ec64e8f5ad5ce0c2"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga078c3c80d5637850ec64e8f5ad5ce0c2">dma_sniffer_enable</a> (uint channel, uint mode, bool force_channel_enable)</td></tr>
<tr class="memdesc:ga078c3c80d5637850ec64e8f5ad5ce0c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the DMA sniffing targeting the specified channel.  <a href="group__hardware__dma.html#ga078c3c80d5637850ec64e8f5ad5ce0c2">More...</a><br /></td></tr>
<tr class="separator:ga078c3c80d5637850ec64e8f5ad5ce0c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac3b250d97550527a584de9d3f770acea"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gac3b250d97550527a584de9d3f770acea">dma_sniffer_set_byte_swap_enabled</a> (bool swap)</td></tr>
<tr class="memdesc:gac3b250d97550527a584de9d3f770acea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the Sniffer byte swap function.  <a href="group__hardware__dma.html#gac3b250d97550527a584de9d3f770acea">More...</a><br /></td></tr>
<tr class="separator:gac3b250d97550527a584de9d3f770acea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1366c938a8322aa1eb8e703b1f22d6af"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga1366c938a8322aa1eb8e703b1f22d6af">dma_sniffer_set_output_invert_enabled</a> (bool invert)</td></tr>
<tr class="memdesc:ga1366c938a8322aa1eb8e703b1f22d6af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the Sniffer output invert function.  <a href="group__hardware__dma.html#ga1366c938a8322aa1eb8e703b1f22d6af">More...</a><br /></td></tr>
<tr class="separator:ga1366c938a8322aa1eb8e703b1f22d6af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2c5775bdb86d63a4866b2f6f5b41143"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaa2c5775bdb86d63a4866b2f6f5b41143">dma_sniffer_set_output_reverse_enabled</a> (bool reverse)</td></tr>
<tr class="memdesc:gaa2c5775bdb86d63a4866b2f6f5b41143"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the Sniffer output bit reversal function.  <a href="group__hardware__dma.html#gaa2c5775bdb86d63a4866b2f6f5b41143">More...</a><br /></td></tr>
<tr class="separator:gaa2c5775bdb86d63a4866b2f6f5b41143"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c9bcbe60b4c6102cae3e616476c4735"><td class="memItemLeft" align="right" valign="top">
static void&#160;</td><td class="memItemRight" valign="bottom"><b>dma_sniffer_disable</b> (void)</td></tr>
<tr class="memdesc:ga9c9bcbe60b4c6102cae3e616476c4735"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the DMA sniffer. <br /></td></tr>
<tr class="separator:ga9c9bcbe60b4c6102cae3e616476c4735"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacab1f8010c206dfc77b81cb16902a4e4"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gacab1f8010c206dfc77b81cb16902a4e4">dma_sniffer_set_data_accumulator</a> (uint32_t seed_value)</td></tr>
<tr class="memdesc:gacab1f8010c206dfc77b81cb16902a4e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the sniffer's data accumulator with initial value.  <a href="group__hardware__dma.html#gacab1f8010c206dfc77b81cb16902a4e4">More...</a><br /></td></tr>
<tr class="separator:gacab1f8010c206dfc77b81cb16902a4e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3527c2567c9253ca602b91d30ae49d1e"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga3527c2567c9253ca602b91d30ae49d1e">dma_sniffer_get_data_accumulator</a> (void)</td></tr>
<tr class="memdesc:ga3527c2567c9253ca602b91d30ae49d1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the sniffer's data accumulator value.  <a href="group__hardware__dma.html#ga3527c2567c9253ca602b91d30ae49d1e">More...</a><br /></td></tr>
<tr class="separator:ga3527c2567c9253ca602b91d30ae49d1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08fc90c0064510e7a0a2cf8d1cd187bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga08fc90c0064510e7a0a2cf8d1cd187bc">dma_timer_claim</a> (uint timer)</td></tr>
<tr class="memdesc:ga08fc90c0064510e7a0a2cf8d1cd187bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark a dma timer as used.  <a href="group__hardware__dma.html#ga08fc90c0064510e7a0a2cf8d1cd187bc">More...</a><br /></td></tr>
<tr class="separator:ga08fc90c0064510e7a0a2cf8d1cd187bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga890490576d8806b8933aad0e34d09c5e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga890490576d8806b8933aad0e34d09c5e">dma_timer_unclaim</a> (uint timer)</td></tr>
<tr class="memdesc:ga890490576d8806b8933aad0e34d09c5e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark a dma timer as no longer used.  <a href="group__hardware__dma.html#ga890490576d8806b8933aad0e34d09c5e">More...</a><br /></td></tr>
<tr class="separator:ga890490576d8806b8933aad0e34d09c5e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2f218b6acd97e09430afbb74172bd570"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga2f218b6acd97e09430afbb74172bd570">dma_claim_unused_timer</a> (bool required)</td></tr>
<tr class="memdesc:ga2f218b6acd97e09430afbb74172bd570"><td class="mdescLeft">&#160;</td><td class="mdescRight">Claim a free dma timer.  <a href="group__hardware__dma.html#ga2f218b6acd97e09430afbb74172bd570">More...</a><br /></td></tr>
<tr class="separator:ga2f218b6acd97e09430afbb74172bd570"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b45bfe6985f8c0894d34876eedc3090"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga9b45bfe6985f8c0894d34876eedc3090">dma_timer_is_claimed</a> (uint timer)</td></tr>
<tr class="memdesc:ga9b45bfe6985f8c0894d34876eedc3090"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a dma timer is claimed.  <a href="group__hardware__dma.html#ga9b45bfe6985f8c0894d34876eedc3090">More...</a><br /></td></tr>
<tr class="separator:ga9b45bfe6985f8c0894d34876eedc3090"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga58f9c3cb606759e4620c82583f833dc8"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga58f9c3cb606759e4620c82583f833dc8">dma_timer_set_fraction</a> (uint timer, uint16_t numerator, uint16_t denominator)</td></tr>
<tr class="memdesc:ga58f9c3cb606759e4620c82583f833dc8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the multiplier for the given DMA timer.  <a href="group__hardware__dma.html#ga58f9c3cb606759e4620c82583f833dc8">More...</a><br /></td></tr>
<tr class="separator:ga58f9c3cb606759e4620c82583f833dc8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga75ef6881795fd1760fe813f9e0a79223"><td class="memItemLeft" align="right" valign="top">static uint&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga75ef6881795fd1760fe813f9e0a79223">dma_get_timer_dreq</a> (uint timer_num)</td></tr>
<tr class="memdesc:ga75ef6881795fd1760fe813f9e0a79223"><td class="mdescLeft">&#160;</td><td class="mdescRight">Return the DREQ number for a given DMA timer.  <a href="group__hardware__dma.html#ga75ef6881795fd1760fe813f9e0a79223">More...</a><br /></td></tr>
<tr class="separator:ga75ef6881795fd1760fe813f9e0a79223"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5da1507764272564a75939e2cf38fa9a"><td class="memItemLeft" align="right" valign="top">static int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga5da1507764272564a75939e2cf38fa9a">dma_get_irq_num</a> (uint irq_index)</td></tr>
<tr class="memdesc:ga5da1507764272564a75939e2cf38fa9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Return DMA_IRQ_&lt;irqn&gt;  <a href="group__hardware__dma.html#ga5da1507764272564a75939e2cf38fa9a">More...</a><br /></td></tr>
<tr class="separator:ga5da1507764272564a75939e2cf38fa9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga655130988c1045bdf711135698adf321"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga655130988c1045bdf711135698adf321">dma_channel_cleanup</a> (uint channel)</td></tr>
<tr class="memdesc:ga655130988c1045bdf711135698adf321"><td class="mdescLeft">&#160;</td><td class="mdescRight">Performs DMA channel cleanup after use.  <a href="group__hardware__dma.html#ga655130988c1045bdf711135698adf321">More...</a><br /></td></tr>
<tr class="separator:ga655130988c1045bdf711135698adf321"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac5cde69b01ff6105d7ac019b7d092329"><td class="memItemLeft" align="right" valign="top"><a id="ac5cde69b01ff6105d7ac019b7d092329" name="ac5cde69b01ff6105d7ac019b7d092329"></a>
void&#160;</td><td class="memItemRight" valign="bottom"><b>print_dma_ctrl</b> (<a class="el" href="structdma__channel__hw__t.html">dma_channel_hw_t</a> *channel)</td></tr>
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